Efficient self-replication of digital circuits in programmable logic devices

This article presents the implementation of a selfreplication algorithm in a Field Programmable Gate Array (FPGA). Whereas previous research on self-replication has been mostly limited to theoretical examples and small problem sizes, this work shows how the Tom Thumb self-replication algorithm can be extended to take into account realistic FPGA architectures and representative processor-scale digital logic circuits. To achieve this objective, the algorithm was implemented within the POEtic tissue, a programmable logic device for bioinspired systems, and a dedicated processor, based on the MOVE paradigm, was developed. Starting from a single processor, the self-replication process can be used to generate an arbitrarily large array of identical processors that then differentiate to realize a given application. In this article, this process is demonstrated through a four-processor system that implements a simple counter. The ultimate goal of this research is to demonstrate how a bio-inspired approach can exploit self-replication to tackle the complexity and high fault rates of next-generation electronic devices.